Execution time dependencies:
  - Core clock
  - Bus clock / GPIO access
  - Compiler optimization
  - Flash wait states / Flash accelerator
  - Cache
  - ITCM / DTCM (see https://vivonomicon.com/2020/09/10/bare-metal-stm32-programming-part-13-running-temporary-ram-programs-and-using-tightly-coupled-memories/)

Master clock out pin, MCO

Read advice about interupt latency in https://www.electronicproducts.com/an-overview-of-the-arm-cortex-r5-core/#